EDA实验交通灯设计报告.doc

EDA原理及应用
实验报告

题目：交通灯控制器

专业：电子信息工程
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一、 设计题目：交通灯控制器
二、 设计目标：
1、 设计一个交通信号灯控制器，由一条主干道和一条支干道汇合成十字路口，在每个入口处设置红、绿、黄三色信号灯，红灯亮禁止通行，绿灯亮允许通行，黄灯亮则给行驶中的车辆有时间停在禁行线外。
2、 红、绿、黄发光二极管作信号灯。
3、 主干道亮绿灯时，支干道亮红灯；支干道亮绿灯时，主干道亮红灯。
4、 主、支干道均有车时，两者交替允许通行，主干道每次放行45秒，支干道每次放行25秒，设立45秒、25秒计时、显示电路。
5、 在每次由绿灯亮到红灯亮的转换过程中，要亮5秒黄灯作为过渡，使行驶中的车辆有时间停到禁行线外，设立5秒计时、显示电路。

三、 设计原理：（含系统总的原理图）

由两个分频器模块，三个计数器模块及它的选择器，一个扫描数码管模块，和一个红绿灯控制模块连接而成。

RTL状态图
四、 设计内容：（含状态转换图、软件流程图、说明文字等，每单独模块的图标和VHDL程序；最后为总体程序框图）
分频器1

LIBRARY IEEE;
USE IEEE.STD_LOGIC_1164.ALL;
USE IEEE.STD_LOGIC_UNSIGNED.ALL;
ENTITY DVF IS
PORT(CLK:IN STD_LOGIC;
--D:IN STD_LOGIC_VECTOR(3 DOWNTO 0);
FOUT:OUT STD_LOGIC);
END;
ARCHITECTURE one OF DVF IS
SIGNAL FULL:STD_LOGIC;
BEGIN
P_REG:PROCESS(CLK)
VARIABLE CNT8:INTEGER RANGE 48000000 DOWNTO 0;
BEGIN
IF CLK'EVENT AND CLK='1' THEN
IF CNT8=24000000 THEN
CNT8:=0;
FULL<='1';
ELSE CNT8:=CNT8+1;
FULL<='0';
END IF;
END IF;
END PROCESS P_REG;
P_DIV:PROCESS(FULL)
VARIABLE CNT2:STD_LOGIC;
BEGIN
IF FULL'EVENT AND FULL='1' THEN
CNT2:=NOT CNT2;
IF CNT2='1' THEN FOUT<='1';ELSE FOUT<='0';
END IF;
END IF;
END PROCESS P_DIV;
END;

说明：采用的是48M时钟输入，作为后面的时钟信号。

分频器2

LIBRARY IEEE;
USE IEEE.STD_LOGIC_1164.ALL;
USE IEEE.STD_LOGIC_UNSIGNED.ALL;
ENTITY DVF2 IS
PORT(CLK:IN STD_LOGIC;
--D:IN STD_LOGIC_VECTOR(3 DOWNTO 0);
FOUT:OUT STD_LOGIC);
END;
ARCHITECTURE one OF DVF2 IS
SIGNAL FULL:STD_LOGIC;
BEGIN
P_REG:PROCESS(CLK)
VARIABLE CNT8:INTEGER RANGE 48000000 DOWNTO 0;
BEGIN
IF CLK'EVENT AND CLK='1' THEN
IF CNT8=20000 THEN
CNT8:=0;
FULL<='1';
ELSE CNT8:=CNT8+1;
FULL<='0';
END IF;
END IF;
END PROCESS P_REG;
P_DIV:PROCESS(FULL)
VARIABLE CNT2:STD_LOGIC;
BEGIN
IF FULL'EVENT AND FULL='1' THEN
CNT2:=NOT CNT2;
IF CNT2='1' THEN FOUT<='1';ELSE FOUT<='0';
END IF;
END IF;
END PROCESS P_DIV;
END;

说明：改变了分频器的大小，这个频率很高，是给扫描数码管模块使用的。

计数器1

LIBRARY IEEE;
USE IEEE.STD_LOGIC_1164.ALL;
USE IEEE.STD_LOGIC_UNSIGNED.ALL;
ENTITY cntn IS
PORT(CLK:IN STD_LOGIC;
CLR:IN STD_LOGIC_vector(2 downto 0);
U:IN STD_LOGIC_VECTOR(2 DOWNTO 0);
A,B:OUT STD_LOGIC_VECTOR(3 DOWNTO 0));
END;
ARCHITECTURE bhv OF cntn IS
SIGNAL J,K,L:STD_LOGIC;
SIGNAL Q2,Q1:STD_LOGIC_VECTOR(3 DOWNTO 0);
BEGIN
a1:PROCESS(CLK)
BEGIN
IF CLR="001" THEN Q1<="0100";
ELSIF U="010" THEN
IF CLK'EVENT AND CLK='1' THEN
Q1<=Q1-1; IF Q1="0000" THEN Q1<="1001";J<='1';ELSE J<='0';END IF;
END IF;A<=Q1;
END IF;
END PROCESS;

a2:PROCESS(J)
BEGIN
IF CLR="001" THEN Q2<="0010";
ELSIF U="010" THEN
IF J'EVENT AND J='1' THEN
Q2<=Q2-1; IF Q2="0000" THEN Q2<="0010";K<='0';ELSE K<='1';END IF;
END IF;B<=Q2;
END IF;
END PROCESS;

END ;

说明：作为支干道通行时间，倒计时25s。
计数器2

LIBRARY IEEE;
USE IEEE.STD_LOGIC_1164.ALL;
USE IEEE.STD_LOGIC_UNSIGNED.ALL;
ENTITY cntm IS
PORT(CLK:IN STD_LOGIC;
CLR:IN STD_LOGIC_vector(2 downto 0);
U:IN STD_LOGIC_VECTOR(2 DOWNTO 0);
C,D:OUT STD_LOGIC_VECTOR(3 DOWNTO 0));
END;
ARCHITECTURE bhv OF cntm IS
SIGNAL J,K,L:STD_LOGIC;
SIGNAL Q2,Q1:STD_LOGIC_VECTOR(3 DOWNTO 0);
BEGIN
a1:PROCESS(CLK)
BEGIN
IF CLR="010" THEN Q1<="0101";
ELSIF U="001" THEN
IF CLK'EVENT AND CLK='1' THEN
Q1<=Q1-1; IF Q1="0000" THEN Q1<="1001";J<='1';ELSE J<='0';END IF;
END IF;C<=Q1;
END IF;
END PROCESS;

a2:PROCESS(J)
BEGIN
IF CLR="010" THEN Q2<="0000";
ELSIF U="001" THEN
IF J'EVENT AND J='1' THEN
Q2<=Q2-1; IF Q2="0000" THEN Q2<="0010";K<='0';ELSE K<='1';END IF;
END IF;D<=Q2;
END IF;
END PROCESS;

END ;

说明：要亮5秒黄灯作为过渡

计数器3

LIBRARY IEEE;
USE IEEE.STD_LOGIC_1164.ALL;
USE IEEE.STD_LOGIC_UNSIGNED.ALL;
ENTITY cntl IS
PORT(CLK:IN STD_LOGIC;
CLR:IN STD_LOGIC_vector(2 downto 0);
U:IN STD_LOGIC_VECTOR(2 DOWNTO 0);
E,F:OUT STD_LOGIC_VECTOR(3 DOWNTO 0));
END;
ARCHITECTURE bhv OF cntl IS
SIGNAL J,K,L:STD_LOGIC;
SIGNAL Q2,Q1:STD_LOGIC_VECTOR(3 DOWNTO 0);
BEGIN
a1:PROCESS(CLK)
BEGIN
IF CLR="001" THEN Q1<="0100";
ELSIF U="000" THEN
IF CLK'EVENT AND CLK='1' THEN
Q1<=Q1-1; IF Q1="0000" THEN Q1<="1001";J<='1';ELSE J<='0';END IF;
END IF;E<=Q1;
END IF;
END PROCESS;

a2:PROCESS(J)
BEGIN
IF CLR="001" THEN Q2<="0100";
ELSIF U="000" THEN
IF J'EVENT AND J='1' THEN
Q2<=Q2-1; IF Q2="0000" THEN Q2<="0010";K<='0';ELSE K<='1';END IF;
END IF;F<=Q2;
END IF;
END PROCESS;

END ;

说明：作为主干道通行时间，倒计时45s。
选择器

LIBRARY IEEE;
USE IEEE.STD_LOGIC_1164.ALL;
USE IEEE.STD_LOGIC_UNSIGNED.ALL;
ENTITY xuanze IS
PORT(U:IN STD_LOGIC_VECTOR(2 DOWNTO 0);
A,B,C,D,E,F:IN STD_LOGIC_VECTOR(3 DOWNTO 0);
Q1,Q2:OUT STD_LOGIC_VECTOR(3 DOWNTO 0));
END;
ARCHITECTURE bhv OF xuanze IS

BEGIN
PROCESS(U)
BEGIN
case U IS
WHEN "000"=>Q1<=E;Q2<=F;
WHEN "001"=>Q1<=C;Q2<=D;
WHEN "010"=>Q1<=A;Q2<=B;
WHEN OTHERS=>NULL;
END CASE;
END PROCESS;
END ;

说明：不同的状态数码管分别显示45s，25s，5s倒计时。

红绿灯控制模块

library ieee;
use ieee.std_logic_1164.all;
USE IEEE.STD_LOGIC_UNSIGNED.ALL;
entity deng is
generic(a:integer:=45;
b:integer:=5;
c:integer:=25);
port(clk,rst : in std_logic;
R1,G1,Y1,R2,G2,Y2 : out std_logic;
U:out std_logic_vector(2 downto 0));
end;

architecture one of deng is
type fsm_st is (QA,QB,QC,QD);
signal current_state , next_state : fsm_st;
SIGNAL q: integer range 0 TO 200;

begin

--process(clk)
--begin
--if clk = '1' and clk'event then
--if q=29 then q<=0;else q<=q+1;end if;end if;
--end process;

process (clk)
begin
if rst = '0' then current_state <= QA;q<=0;
elsif clk = '1' and clk'event then
current_state <= next_state;if q=a+b+b+c-1 then q<=0;else q<=q+1;end if;
end if;
end process;

process ( current_state,q)
begin
case current_state is
when QA =>G1 <= '0';R2<= '0';R1<='1';Y1<='1';G2<='1';Y2<='1';U<="000";
if q=a-1 then next_state <= QB;
else next_state <= QA;
end if;
when QB => Y1<='0';R2<= '0';R1<='1';G1 <= '1';G2<='1';Y2<='1';U<="001";
if q=a+b-1 then next_state <= QC;
else next_state <= QB;
end if;
when QC=> R1<='0';G2<= '0';Y1<='1';G1 <= '1';R2<='1';Y2<='1';U<="010";
if q=a+b+c-1 then next_state <= QD;
else next_state <= QC;
end if;
when QD => R1<='0';Y2<= '0';Y1<='1';G1 <= '1';G2<='1';R2<='1';U<="001";
if q=a+b+b+c-1 then next_state <= QA;
else next_state <= QD;
end if;
end case;
end process;
end ;

说明：设置四种状态QA主绿，支红；QB主黄，支红；QC主红，支绿；QD主红，支黄；同时用时间控制状态的切换
扫描数码管模块

library ieee;
use ieee.std_logic_1164.all;
use ieee.std_logic_unsigned.all;
entity scan_led is
port( clk:in std_logic;
a1,a2,a3,a4,a5,a6,a7,a8:in std_logic_vector(3 downto 0);
sg:out std_logic_vector(6 downto 0);
bt:out std_logic_vector(7 downto 0));
end;

architecture one of scan_led is
signal cnt8 : std_logic_vector(2 downto 0);
signal a :std_logic_vector(3 downto 0);
begin
p1:process (cnt8)
begin
case cnt8 is
when "000"=>bt<=NOT"00000001";a<=a1;
when "001"=>bt<=NOT"00000010";a<=a2;
when "010"=>bt<=NOT"00000100";a<=a3;
when "011"=>bt<=NOT"00001000";a<=a4;
when "100"=>bt<=NOT"00010000";a<=a5;
when "101"=>bt<=NOT"00100000";a<=a6;
when "110"=>bt<=NOT"01000000";a<=a7;
when "111"=>bt<=NOT"10000000";a<=a8;
when others=>null;
end case;
end process p1;
p2:process(clk)
begin
if clk'event and clk='1' then cnt8<=cnt8+1;
end if;
end process p2;
p3:process(a)
begin
case a is
when "0000"=>sg<=NOT"0111111";when "0001"=>sg<=NOT"0000110";
when "0010"=>sg<=NOT"1011011";when "0011"=>sg<=NOT"1001111";
when "0100"=>sg<=NOT"1100110";when "0101"=>sg<=NOT"1101101";
when "0110"=>sg<=NOT"1111101";when "0111"=>sg<=NOT"0000111";
when "1000"=>sg<=NOT"1111111";when "1001"=>sg<=NOT"1101111";
when "1010"=>sg<=NOT"1110111";when "1011"=>sg<=NOT"1111100";
when "1100"=>sg<=NOT"0111001";when "1101"=>sg<=NOT"1011110";
when "1110"=>sg<=NOT"1111001";when "1111"=>sg<=NOT"1110001";
when others=>null;
end case;
end process p3;
end;

说明：采用共阳7段数码管。经过高频率的扫描给人以同时出现的错觉。虽然有8个输入但我只用了2个；
总体程序框图

时钟信号
分频模块2

扫
描
数
码
管
模
块
45s倒计时

25s倒计时
分频模块1

5s倒计时

选择器

红绿灯控制模块

五、 实验现象(需要有实验现象图片及文字说明)

交通灯设计共有六个灯，当主干道亮绿灯时，支干道亮红灯；45秒倒计时后，主干道亮5秒黄灯；接着支干道亮绿灯时，主干道亮红灯；25秒倒计时后，支干道亮5秒黄灯，依次循环下去。